BU9883FV-W
Datasheet
● Software reset
Software reset is executed when to avoid malfunction after power on, and to reset during command input. Software reset
has several kinds, and 3 kinds of them are shown in the figure below. (Refer to Figure 47-(a), Figure 47-(b), and Figure 47-
(c).) In dummy clock input area, release the SDA0 to 3 buses ('H' by pull up). In dummy clock area, ACK output and read
data '0' (both 'L' level) may be output from EEPROM, therefore, if 'H' is input forcibly, output may conflict and over current
may flow, leading to instantaneous power failure of system power source or influence upon devices.
Dummy clock×14
Start×2
SCL0 to 3
1
2
13
14
Normal command
SDA0 to 3
Normal command
Figure 47-(a) The case of dummy clock +START+START+ command input
Start
Dummy clock×9
Start
SCL0 to 3
1
2
8
9
Normal command
SDA0 to 3
Normal command
Figure 47-(b) The case of START +9 dummy clocks +START+ command input
Start×9
SCL0 to 3
1
2
3
7
8
9
Normal command
SDA0 to 3
Normal command
Figure 47-(c) START×9+ command input
*Start command from START input.
● Acknowledge polling
During internal write execution, all input commands are ignored, therefore ACK is not sent back. During internal automatic
write execution after write cycle input, next command (slave address) is sent, and if the first ACK signal sends back 'L', then
it means end of write action, while if it sends back 'H', it means now in writing. By use of acknowledge polling, next
command can be executed without waiting for tWR = 5ms.
When to write continuously, R/W = 0, when to carry out current read cycle after write, slave address R/W = 1 is sent, and if
ACK signal sends back 'L', then execute word address input and data output and so forth.
First write command
During internal write,
ACK = HIGH is sent back.
S
T
A
R
T
Write command
S
T
O
P
S
T Slave
A
R address
T
A
C
K
H
t WR
S
T Slave
A
R address
T
A
C
K
H
Second write command
S
T Slave
A
R address
T
A
C
K
H
S
T Slave
A
R address
T
A
C Word
K address
L
A
C
K
L
Data
A
C
K
L
S
T
O
P
t WR
After completion of internal write,
ACK=LOW is sent back, so input next
word address and data in succession.
Figure 48. Case to continuously write by acknowledge polling
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TSZ22111 ? 15 ? 001
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TSZ02201-0R2R0G100420-1-2
31.AUG.2012 Rev.001
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